The present invention relates to a technique that is effective for application to a high frequency power amplifier circuit and an electronic component for high frequency power amplification (RF power module) in which the high frequency power amplifier circuit is installed. More particularly, the invention relates to a technique for enhancing the power efficiency of a high frequency power amplifier circuit in which bias application to transistors for amplification is performed by current mirroring.
A high frequency power amplifier circuit (usually consisting of multiple stages) employing semiconductor elements such as MOSFETs (insulated gate type field effect transistors) and GaAs-MESFETs for power amplification is built into a transmitter output section of wireless communication devices (mobile communication devices) such as mobile phones. In the high frequency power amplifier circuit, a bias circuit applies specific bias voltages to the control terminals of the transistors for amplification (the terminals are gate terminals, if the MOSFETs are employed), allowing specific idle currents to flow through the transistors, and in this state, an input high frequency signal is amplified.
Methods of bias application to the control terminals of the transistors for amplification have been proposed. One method is such that an externally supplied control voltage is divided by a resistive divider circuit and the divided voltages are applied (e.g., see patent document 1). Another method is such that a transistor for amplification and a transistor for bias with their gates connected together are provided in each stage of amplification, a bias current is generated by a current mirror circuit comprising a transistor pair which mirrors an externally supplied current at a given ratio, this bias current is allowed to flow through the transistor for bias, and a bias is applied to the transistor for amplification in each stage by current mirroring (e.g., see patent document 2).
A high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, as above, keeps constant idle currents flowing through the transistors for amplification respectively even if the characteristics of the transistors for amplification (the threshold voltages of the FETs) vary. Thus, this amplifier circuit does not need correction for variation among the elements and has an advantage that it is manufactured at a high yield. Throughout this application, when a high frequency signal is not input to the amplifier circuit, that is, the amplifier takes no signal, a drain current (collector current in the case of a bipolar transistor) flowing through each transistor for amplification during bias application to the transistors for amplification by current mirroring is called an idle current.    [Patent document 1] Japanese Unexamined Patent Publication No. 2000-151310    [Patent document 2] Japanese Unexamined Patent Publication No. 2003-017954